ZHCSKX3 March 2020 PCM6240-Q1 , PCM6260-Q1 , PCM6340-Q1 , PCM6360-Q1
ADVANCE INFORMATION for pre-production products; subject to change without notice.
As shown in Figure 90, a single-byte data write transfer begins with the master device transmitting a START condition followed by the I2C device address and the read/write bit. The read/write bit determines the direction of the data transfer. For a write-data transfer, the read/write bit must be set to 0. After receiving the correct I2C slave address and the read/write bit, the device responds with an acknowledge bit (ACK). Next, the master device transmits the register byte corresponding to the device internal register address being accessed. After receiving the register byte, the device again responds with an acknowledge bit (ACK). Then, the master transmits the byte of data to be written to the specified register. When finished, the slave device responds with an acknowledge bit (ACK). Finally, the master device transmits a STOP condition to complete the single-byte data write transfer.