7.5.4 Buffer Timing

The buffer is used to isolate fast transients from the overload protection of the high-precision amplifier. The buffer avoids current into the overload clamp. Fast transients result from the switching transient of a signal multiplexer or a gain change; these transients cannot be filtered in the signal path.

The buffer can be turned on by software using the T bit in the SPI command or by activating a GPIO pin. The on-time of the buffer is set in Register 3 (BUFTIM).

If controlled by software command, the buffer turns active (indicated by BUFA shown in Figure 55) with the last falling edge of SCLK.

Controlling an external MUX through Register 0 activates the GPIO pins after the rising edge of CS, providing an extra delay.

Alternatively, the buffer can be controlled by GPIO4, after configuration (Register 8, bit 4 = 0, and 0x4C10). A rising edge triggers the buffer with a delay of three to four clock cycles. If held high, the buffer [BUFA] remains active. The active time is extended by a minimum of three to four clock cycles plus FLAGTIM.

The buffer active condition can be observed at GPIO5, after configuration for output and special function (0x4820, 0x4C20). The time reference is the end of CS. The buffer is turned on with the 16th falling edge of the SCLK and writing to Register 0 (0x6018). BUFA stays high for 6 μs (BUFTIM0) after CS.

Figure 55. BUFA Timing