SLTS278J November 2010 – March 2020 PTH08T250W
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Description (continued)
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
-
9 Application and Implementation
- 9.1
Typical Application
- 9.1.1
Detailed Design Procedure
- 9.1.1.1 Adjusting the Output Voltage
- 9.1.1.2
Capacitor Recommendations for the PTH08T250W Power Module
- 9.1.1.2.1 Capacitor Technologies
- 9.1.1.2.2 Input Capacitor (Required)
- 9.1.1.2.3 Input Capacitor Information
- 9.1.1.2.4 Output Capacitor (Required)
- 9.1.1.2.5 Output Capacitor Information
- 9.1.1.2.6 TurboTrans Output Capacitance
- 9.1.1.2.7 Non-TurboTrans Output Capacitance
- 9.1.1.2.8 Designing for Fast Load Transients
- 9.1.1.2.9 Capacitor Table
- 9.1.1.3 TurboTrans™ Technology
- 9.1.1.4 TurboTrans™ Selection
- 9.1.1.5 Undervoltage Lockout (UVLO)
- 9.1.1.6 On/Off Inhibit
- 9.1.1.7 Current Sharing
- 9.1.1.8 Prebias Startup Capability
- 9.1.1.9 SmartSync Technology
- 9.1.1.10 Auto-Track™ Function
- 9.1.1
Detailed Design Procedure
- 9.1
Typical Application
- 10Device and Documentation Support
- 11Mechanical, Packaging, and Orderable Information
9.1.1.8 Prebias Startup Capability
A prebias startup condition occurs as a result of an external voltage being present at the output of a power module prior to its output becoming active. This often occurs in complex digital systems when current from another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another path might be via clamp diodes as part of a dual-supply power-up sequencing arrangement. A prebias can cause problems with power modules that incorporate synchronous rectifiers. This is because under most operating conditions, these types of modules can sink as well as source output current.
The PTH family of power modules incorporate synchronous rectifiers, but does not sink current during startup(1), or whenever the Inhibit pin is held low. However, to ensure satisfactory operation of this function, certain conditions must be maintained(2). Figure 29 shows an application demonstrating the prebias startup capability. The startup waveforms are shown in Figure 28. Note that the output current (IO) is negligible until the output voltage rises above the voltage backfed through the intrinsic diodes.
The prebias start-up feature is not compatible with Auto-Track. When the module is under Auto-Track control, it sinks current if the output voltage is below that of a back-feeding source. To ensure a pre-bias hold-off one of two approaches must be followed when input power is applied to the module. The Auto-Track function must either be disabled(3), or the module’s output held off (for at least 50 ms) using the Inhibit pin. Either approach ensures that the Track pin voltage is above the set-point voltage at start up.
- Startup includes the short delay (approximately 10 ms) prior to the output voltage rising, followed by the rise of the output voltage under the module’s internal soft-start control. Startup is complete when the output voltage has risen to either the set-point voltage or the voltage at the Track pin, whichever is lowest.
- To ensure that the regulator does not sink current when power is first applied (even with a ground signal applied to the Inhibit control pin), the input voltage must always be greater than the output voltage throughout the power-up and power-down sequence.
- The Auto-Track function can be disabled at power up by immediately applying a voltage to the module’s Track pin that is greater than its set-point voltage. This can be easily accomplished by connecting the Track pin to VI.
Figure 28. Prebias Startup Waveforms 
Figure 29. Application Circuit Demonstrating Pre-Bias Startup