Layout Example
illustrates an example of a PCB layout for a data acquisition system using the REF80. Some key
considerations are:
- Noise performance
- Connect low-ESR, 0.1μF ceramic bypass
capacitors at VDD, HEATM and HEATP of the REF80.
- Connect 10uF to 100uF class 1
capacitor at REFZ of the REF80.
- Do not run sensitive analog traces in
parallel with digital traces. Avoid crossing digital and analog traces if possible,
and only make perpendicular crossings when absolutely necessary.
- Thermal performance
- The layout must minimize the heat
dissipation to maintain good thermal resistance for REF80.
- Use minimum copper to route
VDD, REF_Z, REF_GND signal.
- Use copper as per current requirement
for HEATP and HEATM pin.
- Avoid direct copper pours underneath
the package.
- Seebeck effect
- Avoid multiple metal-metal junction
to minimize Seebeck effect.
- Long term stability performance
- Provide strain relief directly to
pins as shown in the Layout Example.
- Provide cuts near to the pin,
perpendicular to the pins and corners.
- Avoid single point strain
accumulation.