ZHCSEQ7C February 2016 – December 2021 SN65DP141
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| POWER CONSUMPTION | ||||||
| PDL | Device Power dissipation | VOD = Low, VCC = 3.3 V and all 4 channels active | 450 | 625 | mW | |
| VOD = Low, VCC = 2.5 V and all 4 channels active | 317 | 475 | mW | |||
| PDH | Device Power dissipation | VOD = High, VCC = 3.3 V and all 4 channels active | 697 | 925 | mW | |
| VOD = High, VCC = 2.5 V and all 4 channels active | 485 | 675 | mW | |||
| PDOFF | Device power with all 4 channels switched off | Refer to I2C section for device configuration | 10 | mW | ||
| CMOS DC SPECIFICATIONS | ||||||
| IIH | High level input current | VIN = 0.9 × VCC | -40 | 17 | 40 | µA |
| IIL | Low level input current | VIN = 0.1 × VCC | -40 | 17 | 40 | µA |
| CML INPUTS (IN[3:0]_P, IN[3:0]_N) | ||||||
| RIN | Differential input resistance | INx_P to INx_N | 100 | Ω | ||
| VIN | Input linear dynamic range | Gain = 0.5 | 1200 | mVpp | ||
| VICM | Input common mode voltage | Internally biased | VCC – 0.8 | V | ||
| SCD11 | Input differential to common mode conversion | 100 MHz to 6 GHz | -20 | dB | ||
| SDD11 | Differential input return loss | 100 MHz to 6 GHz | -15 | dB | ||
| CML OUTPUTS (OUT[3:0]_P, OUT[3:0]_N) | ||||||
| VOD | Output linear dynamic range | RL = 100 Ω, VOD = HIGH | 1200 | mVpp | ||
| RL = 100 Ω, VOD = LOW | 600 | mVpp | ||||
| VOS | Output offset voltage | RL = 100 Ω, 0 V applied at inputs | 10 | mVpp | ||
| VOCM | Output common mode voltage | VCC – 0.4 | V | |||
| VCM(RIP) | Common mode output ripple | K28.5 pattern at 12 Gbps on all 4 channels, No interconnect loss, VOD = HIGH | 10 | 20 | mVRMS | |
| VOD(RIP) | Differential path output ripple | K28.5 pattern at 12 Gbps on all channels, No interconnect loss, VIN = 1200 mVpp. | 20 | mVpp | ||
| VOC(SS) | Change in steady-state common mode output voltage between logic states | ±10 | mV | |||