10.1.1 Package Specific

For the ZQE package, to minimize the power supply noise floor, provide good decoupling near the SN65DSI83 device power pins. The use of four ceramic capacitors (2 × 0.1 μF and 2 × 0.01 μF) provides good performance. At the least, TI recommends to install one 0.1-μF and one 0.01-μF capacitor near the SN65DSI83 device. To avoid large current loops and trace inductance, the trace length between decoupling capacitor and device power inputs pins must be minimized. Placing the capacitor underneath the SN65DSI83 device on the bottom of the PCB is often a good choice.