The SN65DSI86 supports Single-Stream Transport (SST) mode over one, two, or 4 lanes at data rates of 1.62 Gbps (RBR), 2.16 Gbps, 2.43 Gbps, 2.7 Gbps (HBR), 3.24 Gbps, 4.32 Gbps, and 5.4 Gbps (HBR2). All lanes operate at the same rate (SN65DSI86 does not support each lane being at a different data rate). The SN65DSI86 allows for software control of the eDP interfaces voltage swing level, pre-emphasis level, and SSC. Because the SN65DSI86 is a DSI to eDP bridge, the SN65DSI86 only supports eDP panels which support ASSR (Alternate Scrambler Seed Reset). Software must either through the DSI interface or I²C interface enable ASSR in the eDP panel before attempting to link train. See the Section 9.2.1.2.5 section on how to enable ASSR in the eDP panel.