The SN65HVD178x-Q1 family of half-duplex transceivers provides internal biasing of the receiver input thresholds in combination with large input-threshold hysteresis. At a positive input threshold of V_IT+ = –35mV and an input hysteresis of V_HYS = 30mV, the receiver output remains logic high under bus-idle, bus-short, or open bus conditions in the presence of up to 130mV_PP differential noise without the need for external failsafe biasing resistors.