In addition to the guidelines on differential trace matching given in Section 11.2.2, the layout guidelines below must be followed:

• Route power and ground nets as planes rather than traces, and keep their widths as large as possible to minimize resistance and inductance while maximizing parasitic capacitance.
• If external components (like transient voltage suppression diodes) are used for transient protection, place them close to the connector port and within the path of the signal lines. Make sure component capacitances are small enough not to impact the RS-485 signaling at the chosen data rate.
• Small-valued series pulse-proof resistances can be used to provide additional immunity to transients. This is needed to limit input currents if the clamping voltages of external transient protection devices exceed the absolute maximum ratings of the transceiver. These resistances must be less than 10 Ω so that the RS-485 signal is not overly attenuated.