ZHCSDL3O MARCH 2001 – April 2018 SN65HVD230 , SN65HVD231 , SN65HVD232
PRODUCTION DATA.
If a logic high (> 0.75 VCC) is applied to RS (pin 8) in Figure 30 and Figure 32, the circuit of the SN65HVD230 enters a low-current, listen only standby mode, during which the driver is switched off and the receiver remains active. In this listen only state, the transceiver is completely passive to the bus. It makes no difference if a slope control resistor is in place as shown in Figure 32. The µP can reverse this low-power standby mode when the rising edge of a dominant state (bus differential voltage > 900 mV typical) occurs on the bus. The µP, sensing bus activity, reactivates the driver circuit by placing a logic low (< 1.2 V) on RS (pin 8).