10.4.1 Driver and Receiver
Table 2. Driver (SN65HVD233 or SN65HVD235)
INPUTS |
OUTPUTS |
D |
LBK/AB |
Rs |
CANH |
CANL |
BUS STATE |
X |
X |
> 0.75 VCC |
Z |
Z |
Recessive |
L |
L or open |
≤ 0.33 VCC |
H |
L |
Dominant |
H or open |
X |
Z |
Z |
Recessive |
X |
H |
≤ 0.33 VCC |
Z |
Z |
Recessive |
Table 3. Receiver (SN65HVD233)
INPUTS |
OUTPUT |
BUS STATE |
VID = V(CANH)–V(CANL) |
LBK |
D |
R |
Dominant |
VID ≥ 0.9 V |
L or open |
X |
L |
Recessive |
VID ≤ 0.5 V or open |
L or open |
H or open |
H |
? |
0.5 V < VID <0.9 V |
L or open |
H or open |
? |
X |
X |
H |
L |
L |
X |
X |
H |
H |
Table 4. Receiver (SN65HVD235)(1)
INPUTS |
OUTPUT |
BUS STATE |
VID = V(CANH)–V(CANL) |
AB |
D |
R |
Dominant |
VID ≥ 0.9 V |
L or open |
X |
L |
Recessive |
VID ≤ 0.5 V or open |
L or open |
H or open |
H |
? |
0.5 V < VID <0.9 V |
L or open |
H or open |
? |
Dominant |
VID ≥ 0.9 V |
H |
X |
L |
Recessive |
VID ≤ 0.5 V or open |
H |
H |
H |
Recessive |
VID ≤ 0.5 V or open |
H |
L |
L |
? |
0.5 V < VID <0.9 V |
H |
L |
L |
(1) H = high level; L = low level; Z = high impedance; X = irrelevant; ? = indeterminate
Table 5. Driver (SN65HVD234)
INPUTS |
OUTPUTS |
D |
EN |
Rs |
CANH |
CANL |
BUS STATE |
L |
H |
≤ 0.33 VCC |
H |
L |
Dominant |
H |
X |
≤ 0.33 VCC |
Z |
Z |
Recessive |
Open |
X |
X |
Z |
Z |
Recessive |
X |
X |
> 0.75 VCC |
Z |
Z |
Recessive |
X |
L or open |
X |
Z |
Z |
Recessive |
Table 6. Receiver (SN65HVD234)(1)
INPUTS |
OUTPUT |
BUS STATE |
VID = V(CANH)–V(CANL) |
EN |
R |
Dominant |
VID≥ 0.9 V |
H |
L |
Recessive |
VID ≤ 0.5 V or open |
H |
H |
? |
0.5 V < VID <0.9 V |
H |
? |
X |
X |
L or open |
H |
(1) H = high level; L = low level; Z = high impedance; X = irrelevant; ? = indeterminate