7 Parameter Measurement Information

Test load capacitance includes probe and jig capacitance (unless otherwise specified). Signal generator characteristics: rise and fall time < 6 ns, pulse rate 100 kHz, 50% duty cycle. Z_O = 50 Ω (unless otherwise specified).

Figure 7-1 Driver Test Circuit, V_OD and V_OC Without Common-Mode Loading

Figure 7-2 Driver Test Circuit, V_OD With Common-Mode Loading

Figure 7-3 Driver V_OC Test Circuit and Waveforms

Figure 7-4 Driver Switching Test Circuit and Waveforms

Figure 7-5 Driver Enable and Disable Test Circuit and Waveforms, High Output

Figure 7-6 Driver Enable and Disable Test Circuit and Waveforms, Low Output

Figure 7-7 Driver Short-Circuit

Figure 7-8 Receiver Switching Test Circuit and Waveforms

Figure 7-9 Receiver Switching Test Circuit and Waveforms

Figure 7-10 Receiver Enable and Disable Test Circuit and Waveforms, Data Output High

Figure 7-11 Receiver Enable and Disable Test Circuit and Waveforms, Data Output Low

Figure 7-12 Receiver Enable From Shutdown Test Circuit and Waveforms

Figure 7-13 Test Circuit and Waveforms, Transient Overvoltage Test

Figure 7-14 Equivalent Input and Output Schematic Diagrams