9.3 Feature Description

Internal ESD protection circuits protect the transceiver against Electrostatic Discharges (ESD) according to IEC61000-4-2 of up to ±12 kV, and against electrical fast transients (EFT) according to IEC61000-4-4 of up to ±4 kV.

The SN65HVD7x full-duplex family provides internal biasing of the receiver input thresholds in combination with large input-threshold hysteresis. At a positive input threshold of V_IT+ = –20 mV and an input hysteresis of V_hys = 40 mV, the receiver output remains logic high under a bus-idle or bus-short condition even in the presence of 120 mV_PP differential noise without the need for external failsafe biasing resistors.

Device operation is specified over a wide temperature range from –40°C to 125°C.