The device contains logic to detect bus stuck dominant system faults and prevent the device from waking up falsely during this system fault. Upon entering sleep mode, the device detects the state of the LIN bus. If the bus is dominant, the wake-up logic is locked out until a valid recessive on the bus "clears" the bus stuck dominant condition. This logic prevents the potential for a cyclical false wakeup of the system if the bus is stuck dominant, preventing excessive current use. Figure 9-2 and Figure 9-3 show the behavior of this protection feature.

Figure 9-2 No Bus Fault: Entering Sleep Mode With Bus Recessive Condition and Wakeup

Figure 9-3 Bus Fault: Entering Sleep Mode With Bus Stuck Dominant Fault, Clearing, and Wakeup