ZHCSFI0
September 2016
SN65HVS883
PRODUCTION DATA.
1
特性
2
应用
3
说明
4
修订历史记录
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Switching Characteristics
6.8
Typical Input Characteristics
6.9
Typical Voltage Regulator Performance Characteristics
7
Parameter Measurement Information
7.1
Waveforms
7.2
Signal Conventions
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Digital Inputs
8.3.2
Debounce Filter
8.3.3
Shift Register
8.3.4
Voltage Regulator
8.3.5
Supply Voltage Monitor
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.1.1
System-Level EMC
9.1.2
Input Channel Switching Characteristics
9.1.3
Digital Interface Timing
9.1.4
Cascading for High Channel Count Input Modules
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Input Stage
9.2.2.2
Setting Debounce Time
9.2.2.3
Example: High-Voltage Sensing Application
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
器件和文档支持
12.1
Third-Party Products Disclaimer
12.2
接收文档更新通知
12.3
社区资源
12.4
商标
12.5
静电放电警告
12.6
Glossary
13
机械、封装和可订购信息
封装选项
机械数据 (封装 | 引脚)
PWP|28
MPDS373B
散热焊盘机械数据 (封装 | 引脚)
PWP|28
PPTD031AA
订购信息
zhcsfi0_oa
11 Layout
11.1 Layout Guidelines
Place series MELF resistors between the field inputs and the device input pins.
Place small ~22 nF capacitors close to the field input pins to reduce noise.
Place a supply buffering 0.1-µF capacitor around as close to the V
CC
pin as possible.
11.2 Layout Example
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