11.1 Decoupling Capacitor Recommendations

To minimize the power supply noise floor, provide good decoupling near the SN65LVDS822 power pins. It is recommended to place one 0.01-μF ceramic capacitor at each power pin, and two 0.1-μF ceramic capacitors on each power node. The distance between the SN65LVDS822 and capacitors should be minimized to reduce loop inductance and provide optimal noise filtering. Placing the capacitor underneath the SN65LVDS822 on the bottom of the PCB is often a good choice. A 100-pF ceramic capacitor can be put at each power pin to optimize the EMI performance.