ZHCSJD7C April   2002  – February 2019 SN65LVDT14 , SN65LVDT41

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      SN65LVDT41 功能框图
      2.      SN65LVDT14 功能框图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     SN65LVDT41 Pin Functions
    2.     SN65LVDT14 Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Receiver Electrical Characteristics
    6. 6.6  Driver Electrical Characteristics
    7. 6.7  Device Electrical Characteristics
    8. 6.8  Receiver Switching Characteristics
    9. 6.9  Driver Switching Characteristics
    10. 6.10 Typical Characteristics
      1. 6.10.1 Receiver
      2. 6.10.2 Driver
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 SN65LVDTxx Driver and Receiver Functionality
      2. 8.3.2 Integrated Termination
      3. 8.3.3 SN65LVDTxx Equivalent Circuits
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Extending a Serial Peripheral Interface Using LVDS Signaling Over Differential Transmission Cables
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 SPI Propagation Delay Limitations
        2. 9.2.2.2 Interconnecting Media
        3. 9.2.2.3 Input Fail-Safe Biasing
        4. 9.2.2.4 Power Decoupling Recommendations
        5. 9.2.2.5 PCB Transmission Lines
        6. 9.2.2.6 Probing LVDS Transmission Lines on PCB
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Microstrip vs. Stripline Topologies
      2. 11.1.2 Dielectric Type and Board Construction
      3. 11.1.3 Recommended Stack Layout
      4. 11.1.4 Separation Between Traces
      5. 11.1.5 Crosstalk and Ground Bounce Minimization
      6. 11.1.6 Decoupling
    2. 11.2 Layout Examples
  12. 12器件和文档支持
    1. 12.1 相关文档
    2. 12.2 接收文档更新通知
    3. 12.3 相关链接
    4. 12.4 社区资源
    5. 12.5 商标
    6. 12.6 静电放电警告
    7. 12.7 术语表
  13. 13机械、封装和可订购信息

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • PW|20
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.6 Driver Electrical Characteristics

over operating free-air temperature range unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
|VOD| Differential output voltage magnitude RL = 100 Ω,
See Figure 9 and Figure 12 		247 340 454 mV
Δ|VOD| Change in differential output voltage magnitude between logic states –50 50
VOC(SS) Steady-state common-mode output voltage See Figure 13 1.125 1.375 V
ΔVOC(SS) Change in steady-state common-mode output voltage between logic states –50 50 mV
VOC(PP) Peak-to-peak common-mode output voltage 50 150 mV
IIH High-level input current VIH = 2 V 20 µA
IIL Low-level input current VIL = 0.8 V 10 µA
IOS Short-circuit output current VOY or VOZ = 0 V ±24 mA
VOD = 0 V ±12
IO(OFF) Power-off output current VCC = 1.5 V, VO = 2.4 V ±1 µA
(1) All typical values are at 25°C and with a 3.3-V supply.
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