ZHCSTE2S March 1996 – February 2024 SN74AHCT1G08
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
The VCC for the device is optimized at 5 V.
Up voltage translation from 3.3 V to 5 V is allowed. The inputs accept VIH levels of 2 V.
Output ringing is minimized by slow edge rates.
Inputs are TTL-Voltage compatible.