ZHCSWZ8N December   1995  – August 2024 SN54AHCT540 , SN74AHCT540

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 说明
  4. Pin Configuration and Functions
  5. Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics
    6. 4.6 Switching Characteristics
    7. 4.7 Operating Characteristics
  6. Parameter Measurement Information
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
      2. 7.2.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support (Analog)
      1. 8.1.1 Related Links
    2. 8.2 接收文档更新通知
    3. 8.3 支持资源
    4. 8.4 Trademarks
    5. 8.5 静电放电警告
    6. 8.6 术语表
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DGV|20
  • DB|20
  • NS|20
  • N|20
  • DW|20
  • PW|20
散热焊盘机械数据 (封装 | 引脚)
订购信息

Pin Configuration and Functions

SN74AHCT540 SN54AHCT540 SN54AHCT540: J
                            Package, 20-Pin CDIP; SN74AHCT540: DB,
                            DGV, DW, N, NS, or PW Package; 20-Pin SSOP, TVSOP, SOIC, PDIP,
                        PDIP, or TSSOP(Top View)Figure 3-1 SN54AHCT540: J Package, 20-Pin CDIP; SN74AHCT540: DB, DGV, DW, N, NS, or PW Package; 20-Pin SSOP, TVSOP, SOIC, PDIP, PDIP, or TSSOP(Top View)
Table 3-1 Pin Functions
PIN I/O DESCRIPTION
NO. NAME
1 OE1 I Output Enable 1
2 A1 I A1 Input
3 A2 I A2 Input
4 A3 I A3 Input
5 A4 I A4 Input
6 A5 I A5 Input
7 A6 I A6 Input
8 A7 I A7 Input
9 A8 I A8 Input
10 GND Ground
11 Y8 O Y8 Output
12 Y7 O Y7 Output
13 Y6 O Y6 Output
14 Y5 O Y5 Output
15 Y4 O Y4 Output
16 Y3 O Y3 Output
17 Y2 O Y2 Output
18 Y1 O Y1 Output
19 OE2 I Output Enable 2
20 VCC Power Pin