SCAS416Q March   1994  – September 2016 SN74ALVC164245

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions: VCCB at 3.3 V
    4. 6.4  Recommended Operating Conditions: VCCA at 2.5 V
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics: VCCA = 2.7 V to 3.6 V
    7. 6.7  Electrical Characteristics: VCCA = 2.3 V to 2.7 V
    8. 6.8  Switching Characteristics
    9. 6.9  Operating Characteristics
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 VCCA = 2.5 V ± 0.2 V to VCCB = 3.3 V ± 0.3 V
    2. 7.2 VCCB = 3.3 V ± 0.3 V to VCCA = 2.5 V ± 0.2 V
    3. 7.3 VCCA = 3.3 V ± 0.3 V to VCCB = 5 V ± 0.5 V
    4. 7.4 VCCB = 5 V ± 0.5 V to VCCA = 2.7 V and 3.3 V ± 0.3 V
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resource
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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8 Detailed Description

8.1 Overview

The SN74ALVC16245 device is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements.

This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V and 5-V system environment.

8.2 Functional Block Diagram

SN74ALVC164245 ld2_cas416.gif Figure 6. Logic Diagram (Positive Logic)

8.3 Feature Description

The SN74ALVC164245 can output 24 mA drive at 3.3V VCC. This device allows down voltage translations and accepts input voltages to VCC + 0.5V. This device is useful for high-speed applications because of the low tpd.

8.4 Device Functional Modes

Table 3 lists the functions of the device.

Table 3. Function Table(1)
(Each 8-Bit Section)

CONTROL INPUTS OUTPUT CIRCUITS OPERATION
OE DIR A PORT B PORT
L L Enabled Hi-Z B data to A bus
L H Hi-Z Enabled A data to B bus
H X Hi-Z Hi-Z Isolation
(1) Input circuits of the data I/Os always are active.
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