The SN74AUC1G125 bus buffer gate is operational from 0.8-V to 2.7-V V_CC, but is optimized for 1.65-V to 1.95-V V_CC operation.

This device is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the current-sinking capability of the driver determines the minimum value of the resistor.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.