This device includes ultra-low-voltage transistor-transistor logic (ULTTL) output drivers. ULTTL outputs are balanced, indicating that the device can sink and source similar currents. They are also specially designed for applications requiring high-speed, low power consumption, and optimal signal integrity while minimizing switching noise.

The ULTTL output driver changes impedance during transition to maximize transition rate while limiting ringing and transmission line reflections. The output is optimized for operation with a direct connection to a 50- to 65-Ω controlled impedance transmission line of up to 15 cm, although it can operate with acceptable signal integrity for controlled impedances of between 30 and 70 Ω.

The outputs of this device are capable of driving larger currents than the device can sustain without being damaged. It is important for the output power of the device to be limited to avoid damage due to overcurrent. The electrical and thermal limits defined in the Absolute Maximum Ratings must be followed at all times.

Unused push-pull CMOS outputs should be left disconnected.