SCES568I June 2004 – September 2016 SN74AUP1G02
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics
- 6.6 Switching Characteristics, CL = 5 pF
- 6.7 Switching Characteristics, CL = 10 pF
- 6.8 Switching Characteristics, CL = 15 pF
- 6.9 Switching Characteristics, CL = 30 pF
- 6.10 Operating Characteristics
- 6.11 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封装选项
请参考 PDF 数据表获取器件具体的封装图。
机械数据 (封装 | 引脚)
- DPW|5
- DBV|5
- DSF|6
- DCK|5
- YFP|6
- DRL|5
- DRY|6
散热焊盘机械数据 (封装 | 引脚)
订购信息
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
9.1 Application Information
The AUP family is TI's premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity. It has a small amount of hysteresis built in allowing for slower or noisy input signals. The lowered drive produces slower edges and prevents overshoot and undershoot on the outputs.
9.2 Typical Application
Figure 5. Typical Application Schematic
9.2.1 Design Requirements
This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus contention because it can drive currents that would exceed maximum limits.
9.2.2 Detailed Design Procedure
- Recommended Input conditions
- Rise time and fall time specs. See (Δt/ΔV) in Recommended Operating Conditions
- Specified high and low levels. See (VIH and VIL) in Recommended Operating Conditions
- Inputs are overvoltage tolerant allowing them to go as high as 3.6 V at any valid VCC
- Recommend output conditions
- Load currents should not exceed 20 mA on the output and 50 mA total for the part
- Outputs should not be pulled above VCC
9.2.3 Application Curves
The AUP family of single gate logic makes excellent translators for the new lower voltage microprocessors that typically are powered from 0.8 V to 1.2 V. They can drop the voltage of peripheral drivers and accessories that are still powered by 3.3 V to the new uC power levels.