ZHCSIL3A August   2018  – January 2019 SN74AXCH8T245

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     典型应用原理图
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics, VCCA = 0.7 V
    7. 6.7  Switching Characteristics, VCCA = 0.8 V
    8. 6.8  Switching Characteristics, VCCA = 0.9 V
    9. 6.9  Switching Characteristics, VCCA = 1.2 V
    10. 6.10 Switching Characteristics, VCCA = 1.5 V
    11. 6.11 Switching Characteristics, VCCA = 1.8 V
    12. 6.12 Switching Characteristics, VCCA = 2.5 V
    13. 6.13 Switching Characteristics, VCCA = 3.3 V
    14. 6.14 Operating Characteristics: TA = 25°C
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Up-Translation and Down-Translation From 0.65 V to 3.6 V
      2. 8.3.2 Multiple Direction Control Pins
      3. 8.3.3 Bus-Hold Circuitry
      4. 8.3.4 Ioff Supports Partial-Power-Down Mode Operation
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 术语表
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Parameter Measurement Information

Unless otherwise noted, all input pulses are supplied by generators having the following characteristics:

  • f =1 MHz
  • Z0 = 50 Ω
  • dv / dt ≤ 1 ns/V

SN74AXCH8T245 SN74AXC8T245_LOAD_CIRCUIT.gif
CL includes probe and jig capacitance.
Figure 1. Load Circuit
SN74AXCH8T245 SN74AXC8T245_LOAD_CIRCUIT_CONDITIONS.gif
Output waveform on the conditions that input is driven to a valid Logic Low.
Output waveform on the condition that input is driven to a valid Logic High.
Figure 2. Load Circuit Conditions
SN74AXCH8T245 SN74AXC8T245_PROPAGATION_DELAY.gif
VCCI is the supply pin associated with the input port.
VOH and VOL are typical output voltage levels with specified RL, CL, and S1.
Figure 3. Propagation Delay
SN74AXCH8T245 SN74AXC8T245_ENABLE_TIME_AND_DISABLE_TIME.gif
Output waveform on the condition that input is driven to a valid Logic Low.
Output waveform on the condition that input is driven to a valid Logic High.
VCCO is the supply pin associated with the output port.
VOH and VOL are typical output voltage levels with specified RL, CL, and S1.
Figure 4. Enable Time And Disable Time