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SCDS001O November 1992 – September 2015 SN74CBT3244

PRODUCTION DATA.

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)

DGV|20
DB|20
DW|20
PW|20
RGY|20

散热焊盘机械数据 (封装 | 引脚)

订购信息

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The SN74CBT3244 device can be used to control up to 4 bits with 2 channels simultaneously. The application shown in Figure 4 is a 8-bit bus being controlled. The OE pins are used to control the chip from the bus controller. This is a generic example and can apply to many situations. If an application requires fewer than 8 bits, ensure that the A side is tied either high or low on unused channels.

9.2 Typical Application

Figure 4. Typical Application

9.2.1 Design Requirements

A 0.1-µF bypass capacitor should be placed between each V_CC pin and GND. Each capacitor should be placed as close as possible to the SN74CBT3244 device.

9.2.2 Detailed Design Procedure

Recommended input conditions:
- For specified high and low levels, see V_IH and V_IL in Electrical Characteristics
- Inputs and outputs are overvoltage tolerant, which allows them to go as high as 5.5 V at any valid V_CC
Recommended output conditions:
- Load currents must not exceed ±64 mA per channel
Frequency selection criterion:
- Added trace resistance or capacitance can reduce maximum frequency capability; use layout practices as directed in Layout Guidelines

9.2.3 Application Curve

Figure 5. ON-Resistance (R_on) Variation vs Temperature1

1. Note device variation mentioned in Electrical Characteristics