Table 8-1 High to Low Translation
(Assuming Dn is at the Higher Voltage Level)GREF(1) | DREF | SREF | INPUTS D8–D1 | OUTPUT S8–S1 | TRANSISTOR |
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H | H | 0 V | X | X | Off |
H | H | VTT(2) | H | VTT(3) | On |
H | H | VTT | L | L(4) | On |
L | L | 0 – VTT | X | X | Off |
(1) GREF should be at least 1.5 V higher than SREF for best translator operation.
(2) VTT is equal to the SREF voltage.
(3) Sn is not pulled up or pulled down.
(4) Sn follows the Dn input LOW.
Table 8-2 Low to High Translation
(Assuming Dn is at the Higher Voltage Level)GREF(1) | DREF | SREF | INPUTS D8–D1 | OUTPUT S8–S1 | TRANSISTOR |
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H | H | 0 V | X | X | Off |
H | H | VTT(2) | VTT | H(3) | Nearly Off |
H | H | VTT | L | L(4) | On |
L | L | 0 – VTT | X | X | Off |
(1) GREF should be at least 1.5 V higher than SREF for best translator operation.
(2) VTT is equal to the SREF voltage.
(3) Dn is pulled up to VCC through an external resistor.
(4) Dn follows the Sn input LOW.