ZHCSRK3F March   1984  – April 2021 SN54HC03 , SN74HC03

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
    1.     Pin Configuration and Functions
      1.      Pin Functions
  5. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Recommended Operating Conditions
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics - 74
    5. 5.5 Electrical Characteristics - 54
    6. 5.6 Switching Characteristics - 54
    7. 5.7 Switching Characteristics - 74
    8. 5.8 Operating Characteristics
    9. 5.9 Typical Characteristics
  6. 6 Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 CMOS Open-Drain Outputs
      2. 7.3.2 Standard CMOS Inputs
      3. 7.3.3 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Power Considerations
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • D|14
  • PW|14
  • N|14
  • NS|14
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.1 Overview

This device contains four independent 2-input NAND gates with open-drain outputs. Each gate performs the Boolean function Y =  A ● B in positive logic.
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