8.1 Overview

Figure 10 describes the SN74HCS596-Q1, an 8-bit shift register that feeds an 8-bit D-type storage register. Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register. All inputs include Schmitt-triggers allowing for slow input transitions and providing more noise margin. Outputs Q_A through Q_H are open-drain which require a pull-up resistor to output a High. The serial output Q_H’ is push-pull.