ZHCSPK3 December   2022 SN74LV164A-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings (1)
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements: VCC = 2.5 V ± 0.2 V
    7. 6.7  Timing Requirements: VCC = 3.3 V ± 0.3 V
    8. 6.8  Timing Requirements: VCC = 5 V ± 0.5 V
    9. 6.9  Switching Characteristics: VCC = 2.5 V ± 0.2 V
    10. 6.10 Switching Characteristics: VCC = 3.3 V ± 0.3 V
    11. 6.11 Switching Characteristics: VCC = 5 V ± 0.5 V
    12. 6.12 Noise Characteristics (1)
    13. 6.13 Operating Characteristics
    14. 6.14 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 接收文档更新通知
    2. 12.2 支持资源
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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8.4 Device Functional Modes

Table 8-1 Function Table(1)(2)
INPUTSOUTPUTS
CLRCLKABQAQB...QH
LXXXLLL
HLXXQA0QB0QH0
H↑HHHQAnQGn
H↑LXLQAnQGn
H↑XLLQAnQGn
(1) QA0, QB0, QH0 = the level of QA, QB, or QH, respectively, before the indicated steady-state input conditions were established.
(2) QAn, QGn = the level of QA or QG before the most recent ↑ transition of the clock: indicates a 1-bit shift.
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