Signals can be translated down using the SN74LV1T86-Q1. The voltage applied at the V_CC will determine the output voltage and the input thresholds as described in the Recommended Operating Conditions and Electrical Characteristics tables.

When connected to a high-impedance input, the output voltage will be approximately V_CC in the HIGH state, and 0 V in the LOW state. As shown in Figure 7-1, ensure that the input signals in the HIGH state are between V_IH(MIN) and 5.5 V, and input signals in the LOW state are lower than V_IL(MAX).

As shown in Figure 7-2 for example, the standard CMOS inputs for devices operating at 5.0-V, 3.3-V or 2.5-V can be down-translated to match 1.8 V CMOS signals when operating from 1.8-V V_CC.

Down Translation Combinations are as follows:

• 1.8-V V_CC – Inputs from 2.5-V, 3.3-V, and 5.0-V
• 2.5-V V_CC – Inputs from 3.3-V and 5.0-V
• 3.3-V V_CC – Inputs from 5.0-V