ZHCSWI8K May 1999 – September 2024 SN74LV4051A
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
PIN | TYPE(2) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
A | 11 | I | Selector line A for outputs (see Section 7.4 for specific information) |
B | 10 | I | Selector line B for outputs (see Section 7.4 for specific information) |
C | 9 | I | Selector line C for outputs (see Section 7.4 for specific information) |
COM | 3 | O/I(1) | Output/Input of mux |
GND | 7, 8 | — | Ground |
INH | 6 | I(1) | Enables the outputs of the device. Logic low level with turn the outputs on, high level will turn them off. |
Y0 | 13 | I/O(1) | Input/Output to mux |
Y1 | 14 | I/O(1) | Input/Output to mux |
Y2 | 15 | I/O(1) | Input/Output to mux |
Y3 | 12 | I/O(1) | Input/Output to mux |
Y4 | 1 | I/O(1) | Input/Output of mux |
Y5 | 5 | I/O(1) | Input/Output to mux |
Y6 | 2 | I/O(1) | Input/Output to mux |
Y7 | 4 | I/O(1) | Input/Output to mux |
VCC | 16 | — | Device power |