Using the SN74LVxTxx family to translate up is very simple. The input switching threshold is lowered so the high level of the input voltage can be much lower than a typical CMOS V_IH. For instance, If the V_CC is 3.3 V then the typical CMOS switching threshold would be V_CC / 2 or 1.65 V. This means the input high level must be at least V_CC × 0.7 or 2.31 V. On the LVxT devices the input threshold for 3.3-V V_CC is approximately 1 V. This allows a signal with a 1.8-V V_IH to be translated up to the V_CC level of 3.3 V.

Up translation possibilities with SN74LVxTxx:

• With 2.5-V V_CC from 1.8 V to 2.5 V.
• With 3.3-V V_CC from 1.8 V or 2.5 V to 3.3 V.
• With 5-V V_CC From 2.5 V or 3.3 V to 5 V.