1 Features

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
• ESD Protection Exceeds JESD 22
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)
• Available in Texas Instruments
  NanoStar™ and NanoFree™ Packages
• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 5.3 ns at 3.3 V
• Low Power Consumption, 10-µA Maximum I_CC
• ±24-mA Output Drive at 3.3 V
• I_off Supports Partial-Power-Down Mode Operation

2 Applications

• AV Receiver
• Audio Dock: Portable
• Blu-Ray Player and Home Theater
• Embedded PC
• MP3 Player/Recorder (Portable Audio)
• Personal Digital Assistant (PDA)
• Power: Telecom/Server AC/DC Supply: Single Controller: Analog and Digital
• Solid State Drive (SSD): Client and Enterprise
• TV: LCD/Digital and High-Definition (HDTV)
• Tablet: Enterprise
• Video Analytics: Server
• Wireless Headset, Keyboard, and Mouse

3 Description

The SN74LVC1G132 device contains one 2-input NAND gate with Schmitt-trigger inputs designed for 1.65-V to 5.5-V V_CC operation and performs the Boolean function Y = A × B or Y = A + B in positive logic.

Because of Schmitt action, this device has different input threshold levels for positive-going (V_T+) and negative-going (V_T–) signals.

This device can be triggered from the slowest of input ramps and still give clean jitter-free output signals.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

1. For all available packages, see the orderable addendum at the end of the data sheet.

Logic Diagram (Positive Logic)