SCES323Q June 2001 – March 2017 SN74LVC1G66
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封装选项
请参考 PDF 数据表获取器件具体的封装图。
机械数据 (封装 | 引脚)
- DBV|5
- DSF|6
- DCK|5
- DRL|5
- YZP|5
- DRY|6
散热焊盘机械数据 (封装 | 引脚)
- DRY|6
订购信息
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
9.1 Application Information
The SN74LVC1G66 can be used in any situation where an SPST switch would be used and a solid-state, voltage-controlled version is preferred.
9.2 Typical Application
Figure 11. Typical Application Schematic
9.2.1 Design Requirements
The SN74LVC1G66 allows on and off control of analog and digital signals with a digital control signal. All input signals should remain between 0 V and VCC for optimal operation.
9.2.2 Detailed Design Procedure
- Recommended Input Conditions:
- For rise time and fall time specifications, see Δt/Δv in Recommended Operating Conditions.
- For specified high and low levels, see VIH and VIL in Recommended Operating Conditions.
- Inputs and outputs are overvoltage tolerant allowing them to go as high as 5.5 V at any valid VCC.
- Recommended Output Conditions:
- Load currents should not exceed ±50 mA.
- Frequency Selection Criterion:
- Maximum frequency tested is 150 MHz.
- Added trace resistance/capacitance can reduce maximum frequency capability; use layout practices as directed in Layout.
9.2.3 Application Curve
Figure 12. ron vs VI, VCC = 2.5 V (SN74LVC1G66)