SCES198N April 1999 – December 2015 SN74LVC2G08
PRODUCTION DATA.
- 1Features
- 2Applications
- 3Specifications
- 4Detailed Description
- 5Application and Implementation
- 6Power Supply Recommendations
- 7Layout
- 8Device and Documentation Support
- 9Mechanical, Packaging, and Orderable Information
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4 Detailed Description
4.1 Overview
The SN74LVC1G06 device contains two positive-AND gates with a maximum sink current of 24 mA. A very low tpd of 4.7ns at 3.3V makes the device ideal for high speed applications. Additionally, 5.5V tolerant inputs allow the device to be used as a down translator if needed.
4.2 Functional Block Diagram
4.3 Feature Description
4.3.1 Down Voltage Translation
SN74LVC2G08 allows for logic input and output signals up to 5.5 V. While operating at VCC of 3.3 V, the device will still recognize 5.5 V as a valid high input, however, the resulting output will be 3.3 V. This is the same for other voltage levels in the device effectively down translating any input logic level higher than VCC but lower or equal to 5.5 V.
4.4 Device Functional Modes
Table 1 lists the functional modes of the SN74LVC2G08.
Table 1. Function Table
| INPUTS | OUTPUT | |
|---|---|---|
| A | B | Y |
| H | H | H |
| L | X | L |
| X | L | L |