米6体育平台手机版

SCES201N April 1999 – September 2015 SN74LVC2G32

PRODUCTION DATA.

1 Features
2 Applications
3 Description
4 Revision History
5 Pin Configuration and Functions
6 Specifications
7 Parameter Measurement Information
8 Detailed Description
9 Application and Implementation
1. 9.1 Application Information
2. 9.2 Typical Application
10Power Supply Recommendations
11Layout
1. 11.1 Layout Guidelines
2. 11.2 Layout Example
12Device and Documentation Support
13Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)

DCU|8
YZP|8
DCT|8

散热焊盘机械数据 (封装 | 引脚)

订购信息

zhcsa64_oa

8 Detailed Description

8.1 Overview

The SN74LVC2G32 provides two logical OR gates per device and each gate has two inputs. Both input paths use identical circuitry for matching propagation delays. Supply voltage from 1.65 V to 5.5 V is supported.

8.2 Functional Block Diagram

Figure 3. Logic Diagram (Positive Logic)

8.3 Feature Description

The SN74LVC2G32 inputs per gate can accept up to 5.5 V regardless of V_CC.

8.4 Device Functional Modes

Table 1 lists the functional modes for the SN74LVC2G32.

Table 1. Function Table (Each Gate)⁽¹⁾

INPUTS		OUTPUT Y
A	B	OUTPUT Y
H	X	H
X	H	H
L	L	L

(1) Y = A + B in positive logic.