ZHCSQV8 August 2022 SN74LXC1T14-Q1
PRODUCTION DATA
- 1 特性
- 2 应用
- 3 说明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 CMOS Schmitt-Trigger Inputs with Integrated Pulldowns
- 8.3.2 Balanced High-Drive CMOS Push-Pull Outputs
- 8.3.3 Partial Power Down (Ioff)
- 8.3.4 VCC Isolation and VCC Disconnect (Ioff-float)
- 8.3.5 Over-Voltage Tolerant Inputs
- 8.3.6 Glitch-Free Power Supply Sequencing
- 8.3.7 Negative Clamping Diodes
- 8.3.8 Fully Configurable Dual-Rail Design
- 8.3.9 Supports High-Speed Translation
- 8.4 Device Functional Modes
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
7.1 Load Circuit and Voltage Waveforms
Unless otherwise noted, all input pulses are supplied by generators having the following characteristics:
- f = 1 MHz
- ZO = 50 Ω
- Δt/ΔV ≤ 1 ns/V
- CL includes probe and jig capacitance.
Table 7-1 Load Circuit
Conditions
| Parameter | VCCO | RL | CL | S1 | VTP | |
|---|---|---|---|---|---|---|
| tpd | Propagation (delay) time | 1.1 V – 5.5 V | 2 kΩ | 15 pF | Open | N/A |
- VCCI is the supply pin associated with the input port.
- VOH and VOL are typical output voltage levels that occur with specified RL, CL, and S1
- VCCI is the supply pin associated with the input port.
- VOH and VOL are typical output voltage levels that occur with specified RL, CL, and S1