11.1 Layout Guidelines

When using multiple bit logic, devices inputs must never float.

Devices with multiple-emitter inputs (SN74 and SN74S series) need special care. Because no voltage greater than 5.5 V must be applied to the inputs (if exceeded, the base-emitter junction at the inputs breaks down), the inputs of these devices must be connected to the supply voltage, V_CC, through series resistor, R_S (see Figure 5). This resistor must be dimensioned such that the current flowing into the gate or gates, which results from overvoltage, does not exceed 1 mA. However, because the high-level input current of the circuits connected to the gate flows through this resistor, the resistor must be dimensioned so that the voltage drop across it still allows the required high level. Equation 1 and Equation 2 are for dimensioning resistor, R_S, and several inputs can be connected to a high level through a single resistor if the following conditions are met.

Equation 1.

Equation 2.

where

• n = number of inputs connected
• I_IH = high input current (typical 40 µA)
• V_CC(min) = minimum supply voltage, V_CC
• V_CCP = maximum peak voltage of the supply voltage, V_CC (about 7 V)

11.2 Layout Example

Figure 5. Series Resistor Connected to Unused Inputs of Multiple-Emitter Transistors