ZHCSN44B December 2021 – December 2023 SN75LVPE5421
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
The SN75LVPE5421 deploys an RX detect state machine that governs the RX detection cycle as defined in the PCI express specifications. At device power up or through manually triggered event using PD or SEL pin or writing to the relevant I2C/SMBus register, the redriver determines whether or not a valid PCI express termination is present at the far end of the link. The RX_DET pin of SN75LVPE5421 provides additional flexibility for system designers to appropriately set the device in desired mode according to Table 6-4. For the PCIe application the RX_DET pin can be left floating for default settings.
Note: power up ramp or PD/SEL event triggers RX detect for all four channels. In applications where SN75LVPE5421 channels are used for multiple PCIe links, the RX detect function can be performed for individual channels through writing in appropriate I2C/SMBus registers.
| PD | RX_DET | RX Common-mode Impedance | COMMENTS |
|---|---|---|---|
| L | L0 | Always 50 Ω | PCI Express RX detection state machine is disabled. Recommended for non PCIe interface use case where the SN75LVPE5421 is used as buffer with equalization. |
| L | L1 | Pre Detect: Hi-Z Post Detect: 50 Ω. |
Outputs polls until 3 consecutive valid detections |
| L | L2 | Pre Detect: Hi-Z Post Detect: 50 Ω. |
Outputs polls until 2 consecutive valid detections |
| L | L3 | Pre Detect: Hi-Z Post Detect: 50 Ω. |
Reserved |
| L | L4 (Float) | Pre Detect: Hi-Z Post Detect: 50 Ω. | TX polls every ≅150 µs until valid termination is detected. RX CM impedance held at Hi-Z until detection Reset by asserting PD high for 200 µs then low. Recommended default setting for PCIe. |
| H | X | Hi-Z | Reset Channels and set their RX impedance to Hi-Z |