Faults are reported in live and latched status registers. The live registers, P1_R45 to P1_R55, are updated continuously with each new scan and report the most recent measurements reported by the diagnostics processor. The latched status of each diagnostic fault is reported by the channel in P1_R60 to P1_R67, and a latched summary by the channel is reported in P1_R52 to P1_R59. If the LTCH_CLR_ON_READ, P1_R66_D0, bit is set to '0', then the latched registers clear upon reading, and are latched if the associated bit in the live fault registers transitions from a ‘0’ to a ‘1’. A transition of any bit in the latched register from a ‘0’ to ‘1’ triggers an interrupt request.

For detecting a persistent fault, an additional mode is available for the latched registers. In this mode, the latched registers are only cleared upon reading if the status bit in the associated live status register is ‘0’ at the time of reading. This mode is enabled (default setting) by configuring LTCH_CLR_ON_READ, P0_R66_D0 to a ‘1’.