ZHCSKM5 December 2019 TAS2110
PRODUCTION DATA.
Sets ASI clock error handeling and interrupt configuration.
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | CLK_ERR_PWR_EN | RW | 0h | Power up/down based on valid ASI clocks is
0b = Disable 1b = Enabled |
6 | CLK_HALT_EN | RW | 0h | Put device to sleep(halt) after clock error lasts longer than CLK_HALT_TIMER is
0b = Enable 1b =: Disable |
5-3 | CLK_HALT_TIMER[2:0] | RW | 3h | If CLK_HALT_EN device will goto sleep after
000b = 1 ms 001b = 3.27 ms 010b = 26.21ms 011b = 52.42ms 100b = 104.85ms 101b = 209.71ms 110b = 419.43ms 111b = 838.86ms |
2 | INT_CLR_LTCH | RW | 0h | Clear INT_LTCH registers
0b = Don't clear 1b = Clear (self clearing bit) |
1-0 | IRQZ_PIN_CFG[1:0] | RW | 1h | IRQZ interrupt configuration. IRQZ will assert
00b = on any unmasked live interrupts 01b = on any unmasked latched interrupts 10b = for 2-4ms one time on any unmasked live interrupt event 11b = for 2-4ms every 4ms on any unmasked latched interrupts |