9.4.1.2 Left-Justified Mode (LJF)

Audio Serial Interface 1 can be put into left-justified mode by programming B0_P1_R1_D[7:5] = 011 and B0_P1_R2_D[7:5] = 011 . Audio Serial Interface 2 can be put into left-justified mode by programming B0_P1_R21_D[7:5] = 011 and B0_P1_R22_D[7:5] = 011. In left-justified mode, the MSB of the right channel is valid on the rising edge of the bit clock following the falling edge of the word clock. Similarly the MSB of the left channel is valid on the rising edge of the bit clock following the rising edge of the word clock.

Figure 26. Timing Diagram for Left-Justified Mode

Figure 27. Timing Diagram for Light-Left Mode with Offset = 1

Figure 28. Timing Diagram for Left-Justified Mode with Offset = 0 and Inverted Bit Clock

For left-justified mode, the number of bit-clocks per frame should be greater than twice the programmed word-length of the data. Also, the programmed offset value should be less than the number of bit-clocks per frame by at least the programmed word-length of the data.