9.1 Overview

The TAS2560 is a low-power, high-performance boosted Class-D Audio amplifier that can be used in numerous applications. The device features an ultra low-noise audio DAC and Class-D power amplifier which incorporates speaker voltage and current sensing feedback. The TAS2560, from a 4.2 V, supply drives up to 5.6 W into a 4-Ω speaker with 1% THDN or 3.7 W into an 8-Ω speaker with 1% THDN. The TAS2560 accepts input audio data rates from 8 kHz to 96 kHz to fully support both speaker-phone and music applications. The MCLK frequency range can be from 512 kHz to 49.15 Mhz. Also supported are crystal based MCLK frequencies of 6 Mhz, 12 Mhz, 13 Mhz, and 19.2 Mhz. Left + Right Input Mixing is available when used in a mono only application.

The multi-level Class-H boost converter generates the Class-D amplifier supply rail. When the audio signal requires a output power below VBAT, the boost improves system efficiency by deactivating and connecting VBAT directly to the Class-D amplifier supply. When higher audio output power is required, the boost quickly activates and provides a much louder and much clearer signal than can be achieved in any standard amplifier speaker system design approach. A boost inductor of 1uH can be used with a slight increase in boost ripple.

On-chip Battery Guard AGC system can limit audio power levels or even shutdown the TAS2560 to avoid an undesired system reset as the supply voltage decays. The Class-D output switching frequency is synchronous with the digital input audio sample rate to avoid left and right PWM frequency differences from beating in stereo applications. PWM Edge rate control and Spread Spectrum features are available if further EMI reduction is desired in the user’s system.

The interrupt request pin, IRQ, indicates a device error condition. The interrupt flag conditions are selectable via I²C and include: thermal overload, Class-D over-current, VBAT level low, brownout, and clock error. The IRQ signal is active-high for an interrupt request and high-Z during normal operation. This behavior can be changed by a register setting to tri-state the pin during normal operation to allow the IRQ pin to be tied in parallel with other active-low interrupt request pins on other devices in the system.

Stereo configuration can be achieved with two TAS2560 devices by using the ADDR pin to set different I²C addresses in I²C mode. Refer to the General I2C Operation sections for more details.