9.4.2 PDM MODE

When the TAS2560 is running in operating Mode 3 - PCM input playback + PDM IVsense output,Mode 4 - PDM input playback only, or Mode 5 - PDM input playback + PDM IVsense output the Pulse Density Modulation (PDM) interface is used and accepts Double-Date Rate (DDR) PDM stream. In PDM mode a modulated signal is applied to DIN pin. The TAS2560 PDM can be configured in a master or slave mode of operation. In master mode operation the BCLK pin will supply a clock generated from the internal clocking block at 8 times the sampling rate(see Table 5). In master mode another clock must be supplied to drive the TAS2560 internal PLL for generation of all internal clocks. In slave mode the input clock should be supplied. The PDM clock should be 8 times the audio sampling rate (PDMCLK=8*Fs) for proper operation. When PDM input clock mode (Table 46) is set to slave mode, PDM slave mode intput clock divider power (Table 48) needs to be set to be powered up. Similarly, when PDM output clock mode (Table 47) is set to slave mode, PDM slave mode output clock divider power (Table 49) needs to be set to powered up.

The Isense and Vsense data is returned on pin DOUT as a DDR PDM stream when operating in Mode 3 - PCM input playback + PDM IVsense output or Mode 5 - PDM input playback + PDM IVsense output. In these modes the Isense data is clocked out during the rising channel and the Vsense data during the falling channel of the PDM clock. Only mono PDM input data is accepted and PDM intput data edge (Table 45) is used to select the clock edge or audio channel.

Figure 50. PDM DDR Waveform