8.3.2 Device Mode and Address Selection

The TAS2564 can operate using one of four selectable device addresses. In TDM/I²S Mode, audio input and output are provided via the FSYNC, SBCLK, SDIN and SDOUT pins using formats including I²S, Left Justified and TDM. Configuration and status are provided via the SDA and SCL pins using the I²C protocol. Table 1 below illustrates how to select the device I²C address. I²C slave addresses are shown as 7-bit address format.

The TAS2564 has a global 7-bit I²C address 0x48. When enabled the device will additionally respond to I²C commands at this address regardless of the AD1 and AD0 pin settings. This is used to speed up device configuration when using multiple TAS2564 devices and programming similar settings across all devices. The I²C ACK / NACK cannot be used during the multi-device writes since multiple devices are responding to the I²C command. The I²C CRC function should be used to ensure each device properly received the I²C commands. At the completion of writing multiple devices using the global address, the CRC at I2C_CKSUM register should be checked on each device using the local address for a proper value. The global I²C address can be disabled using I2C_GBL_EN register. The I²C address is detected by sampling the address pins when SDZ pin is released. Additionally, the address may be re-detected by setting I2C_AD_DET high after power up and the pins will be resampled.