SLASEI6A October 2019 – December 2019 TAS2564
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
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DIGITAL INPUT
and OUTPUT |
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VIH | High-level digital input logic voltage threshold | All digital pins except SDA and SCL | 0.65 × VDD | V | ||
VIL | Low-level digital input logic voltage threshold | All digital pins except SDA and SCL | 0.35 × VDD | V | ||
VIH(I2C) | High-level digital input logic voltage threshold | SDA and SCL | 0.7 × VDD | V | ||
VIL(I2C) | Low-level digital input logic voltage threshold | SDA and SCL | 0.3 × VDD | V | ||
VOH | High-level digital output voltage | All digital pins except SDA, SCL and IRQZ; IOH = 2 mA. | VDD – 0.45 V | V | ||
VOL | Low-level digital output voltage | All digital pins except SDA, SCL and IRQZ; IOL = –2 mA. | 0.45 | V | ||
VOL(I2C) | Low-level digital output voltage | SDA and SCL; IOL(I2C) = –2 mA. | 0.2 × VDD | V | ||
VOL(IRQZ) | Low-level digital output voltage for IRQZ open drain Output | IRQZ; IOL(IRQZ) = –2 mA. | 0.45 | V | ||
IIH | Input logic-high leakage for digital inputs | All digital pins; Input = VDD. | –5 | 0.1 | 5 | µA |
IIL | Input logic-low leakage for digital inputs | All digital pins; Input = GND. | –5 | 0.1 | 5 | µA |
CIN | Input capacitance for digital inputs | All digital pins | 5 | pF | ||
RPD | Pull down resistance for digital input/IO pins when asserted on | SDOUT, SDIN, FSYNC, SBCLK | 50 | kΩ | ||
AMPLIFIER PERFORMANCE - Internal Boost | ||||||
Output Voltage for Full-scale digital Input | Measured at -6 dB FS input and scaled by 6dB | 7.5 | Vrms | |||
POUT | Maximum Continuous Output Power | RL = 32Ω + 33 µH, THD+N = 0.03 %, fin = 1 kHz | 1.75 | W | ||
RL = 8 Ω + 33 µH, THD+N = 0.03 %, fin = 1 kHz | 7 | W | ||||
System efficiency at POUT = 1 W | RL = 8 Ω + 33 µH, fin = 1 kHz | 83 | % | |||
RL = 8 Ω + 33 µH, fin = 1 kHz, VBAT = 4.2 V | 83.5 | % | ||||
System efficiency at POUT =0.5 W | RL = 8 Ω + 33 µH, fin = 1 kHz | 85 | % | |||
RL = 8 Ω + 33 µH, fin = 1 kHz, VBAT = 4.2 V | 85.5 | % | ||||
System efficiency at 0.1% THD+N power level | RL = 8 Ω + 33 µH, POUT = 7W, fin = 1 kHz, | 81 | % | |||
THD+N | Total harmonic distortion + noise | POUT = 0.25 W, RL = 32Ω + 33 µH, fin = 1 kHz | 0.01 | % | ||
POUT = 1 W, RL = 8 Ω + 33 µH, fin = 1 kHz | 0.01 | % | ||||
VN | Idle channel noise | A-Weighted, 20 Hz - 20 kHz | 14.8 | µV | ||
FPWM | Class-D PWM switching frequency | Average frequency in Spread Spectrum Mode, CLASSD_SYNC=0 | 384 | kHz | ||
Fixed Frequency Mode, CLASSD_SYNC=0 | 384 | kHz | ||||
Fixed Frequency Mode, CLASSD_SYNC=1, fs = 44.1, 88.2, 174.6 kHz | 352.8 | kHz | ||||
Fixed Frequency Mode, CLASSD_SYNC=1, fs = 48, 96, 192 kHz | 384 | kHz | ||||
VOS | Output offset voltage | -1.2 | 1.2 | mV | ||
DNR | Dynamic range | A-Weighted, -60 dBFS Method | 110 | dB | ||
SNR | Signal to noise ratio | A-Weighted, Referenced to 1 % THD+N Output Level | 110 | dB | ||
KCP | Click and pop performance | Into and out of Mute, Shutdown, Power Up, Power Down and audio clocks starting and stopping. Measured with APx Plugin. | 3.4 | mV | ||
Programmable digital gain range | 0 | 23 | dBV | |||
Programmable digital gain step size | 0.5 | dB | ||||
AVERROR | Amplifier gain error | POUT = 1 W | ±0.1 | dB | ||
Mute attenuation | Device in Shutdown or Muted in Normal Operation | 110 | dB | |||
VBAT power-supply rejection ratio | VBAT = 3.8 V + 200 mVpp, fripple = 217 Hz | 108 | dB | |||
VBAT = 3.8 V + 200 mVpp, fripple = 20 kHz | 90 | dB | ||||
AVDD power-supply rejection ratio | VDD = 1.8 V + 200 mVpp, fripple = 217 Hz | 98 | dB | |||
VDD = 1.8 V + 200 mVpp, fripple = 20 kHz | 93 | dB | ||||
Turn on time from release of SW shutdown | No Volume Ramping | 1.8 | ms | |||
Volume Ramping | 4.5 | ms | ||||
Turn off time from assertion of SW shutdown to amp Hi-Z | No Volume Ramping | 0.75 | ms | |||
Volume Ramping | 12.5 | ms | ||||
AMPLIFIER PERFORMANCE - Receiver Mode | ||||||
Output Voltage for Full-scale digital Input | Measured at -6 dB FS input and scaled by 6dB | 2 | Vrms | |||
POUT | Maximum Continuous Output Power | RL = 32Ω + 33 µH, THD+N = 0.03 %, fin = 1 kHz | 124.4 | mW | ||
RL = 8 Ω + 33 µH, THD+N = 0.03 %, fin = 1 kHz | 0.45 | W | ||||
System efficiency at POUT = 100 mW | RL = 8 Ω + 33 µH, fin = 1 kHz | 63.5 | % | |||
RL = 8 Ω + 33 µH, fin = 1 kHz, VBAT = 4.2 V | 65.5 | % | ||||
System efficiency at POUT =0.45 W | RL = 8 Ω + 33 µH, fin = 1 kHz | 84.5 | % | |||
RL = 8 Ω + 33 µH, fin = 1 kHz, VBAT = 4.2 V | 85 | % | ||||
THD+N | Total harmonic distortion + noise | POUT = 1 W, RL = 8 Ω + 33 µH, fin = 1 kHz | .01 | % | ||
VN | Idle channel noise | A-Weighted, 20 Hz - 20 kHz, DAC Modulator Running | 10 | µV | ||
FPWM | Class-D PWM switching frequency | Average frequency in Spread Spectrum Mode, CLASSD_SYNC=0 | 384 | kHz | ||
Fixed Frequency Mode, CLASSD_SYNC=0 | 384 | kHz | ||||
Fixed Frequency Mode, CLASSD_SYNC=1, fs = 44.1, 88.2, 174.6 kHz | 352.8 | kHz | ||||
Fixed Frequency Mode, CLASSD_SYNC=1, fs = 48, 96, 192 kHz | 384 | kHz | ||||
VOS | Output offset voltage | -1 | 1 | mV | ||
DNR | Dynamic range | A-Weighted, -60 dBFS Method | 101.2 | dB | ||
SNR | Signal to noise ratio | A-Weighted, Referenced to 1 % THD+N Output Level | 105.73 | dB | ||
KCP | Click and pop performance | Into and out of Mute, Shutdown, Power Up, Power Down and audio clocks starting and stopping. Measured with APx Plugin. | 3.4 | mV | ||
Programmable digital gain range | 0 | 23 | dBV | |||
Programmable digital gain step size | 0.5 | dB | ||||
AVERROR | Amplifier gain error | POUT = 1 W | ±0.1 | dB | ||
Mute attenuation | Device in Shutdown or Muted in Normal Operation | 113 | dB | |||
VBAT power-supply rejection ratio | VBAT = 3.8 V + 200 mVpp, fripple = 217 Hz | 110 | dB | |||
VBAT = 3.8 V + 200 mVpp, fripple = 20 kHz | 95 | dB | ||||
AVDD power-supply rejection ratio | VDD = 1.8 V + 200 mVpp, fripple = 217 Hz | 102 | dB | |||
VDD = 1.8 V + 200 mVpp, fripple = 20 kHz | 102 | dB | ||||
Turn on time from release of SW shutdown | No Volume Ramping | 1.8 | ms | |||
Volume Ramping | 4.5 | ms | ||||
Turn off time from assertion of SW shutdown to amp Hi-Z | No Volume Ramping | 0.75 | ms | |||
Volume Ramping | 12.5 | ms | ||||
BOOST
CONVERTER |
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Max Output Voltage | 0.1A DC load, Average voltage (w/o including ripple) | 13 | V | |||
Startup inrush current limit | default setting | 1.5 | A | |||
Startup inrush limit time | default setting | 0.45 | ms | |||
Switching Frequency | PFM mode | 50 | kHz | |||
Current Control Mode | 4 | MHz | ||||
Minimum Switching Frequency | Current Control Mode | 400 | KHz | |||
Inductor Peak Current Limit | default setting | 5 | A | |||
DIE TEMPERATURE
SENSOR |
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Resolution | 8 | bits | ||||
Die temperature measurement range | -40 | 150 | °C | |||
Die temperature resolution | 0.75 | °C | ||||
Die temperature accuracy | ±5 | °C | ||||
VOLTAGE
MONITOR |
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Resolution | 10 | bits | ||||
VBAT measurement range | 2 | 6 | V | |||
VBAT resolution | 6 | mV | ||||
VBAT accuracy | ±25 | mV | ||||
TDM SERIAL AUDIO
PORT |
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PCM Sample Rates & FSYNC Input Frequency | 16 | 192 | kHz | |||
SBCLK Input Frequency | I2S/TDM Operation | 0.512 | 24.57 | MHz | ||
SBCLK Maximum Input Jitter | RMS Jitter below 40 kHz that can be tolerated without performance degradation | 1 | ns | |||
RMS Jitter above 40 kHz that can be tolerated without performance degradation | 10 | ns | ||||
SBCLK Cycles per FSYNC in I2S and TDM Modes | Values: 64, 96, 128, 192, 256, 384 and 512 | 64 | 512 | Cycles | ||
PCM PLAYBACK
CHARACTERISTICS to fs ≤ 48 kHz |
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fs | Sample Rates | 16 | 48 | kHz | ||
Passband LPF Corner | 0.454 | fs | ||||
Passband Ripple | 20 Hz to LPF cutoff | -0.3 | 0.3 | dB | ||
Stop Band Attenuation | ≥ 0.55 fs | 60 | dB | |||
≥ 1 fs | 65 | dB | ||||
Group Delay | DC to 0.454 fs | 8.6 | 1/fs | |||
PCM PLAYBACK
CHARACTERISTICS fs > 48 kHz |
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fs | Sample Rates | 88.2 | 192 | kHz | ||
Passband LPF Corner | fs = 96 kHz | 0.42 | fs | |||
fs = 192 kHz | 0.21 | fs | ||||
Passband Ripple | DC to LPF cutoff | -0.5 | 0.5 | dB | ||
Stop Band Attenuation | ≥ 0.55 fs | 60 | dB | |||
≥ 1 fs | 65 | dB | ||||
Group Delay | DC to 0.375 fs for 96 kHz | 8.6 | 1/fs | |||
CURRENT
SENSE |
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DNR | Dynamic range | Un-Weighted, Relative to 0 dBFS | 69 | dB | ||
THD+N | Total harmonic distortion + noise | RL = 8 Ω + 33 µH, fin = 1 kHz, POUT = 1 W | -56 | dB | ||
Full-scale input current | 3.3 | A | ||||
Current-sense accuracy | RL = 8 Ω + 33 µH, IOUT = 354 mARMS (POUT = 1 W @ 1kHz) | ±1 | % | |||
Current-sense gain error over temperature | 0°C to 70°C, 8 Ω, using a 60Hz -40dB pilot tone | ±1 | % | |||
Current-sense gain error over output power | 50mW to 0.1 % THD+N level, fin = 1 kHz, 8 Ω, using a 60Hz -40dB pilot tone | ±1.5 | % | |||
LPF passband corner | fs = 16 kHz to 48 kHz | 0.417 | fs | |||
fs = 96 kHz | 0.208 | fs | ||||
fs = 192 kHz | 0.104 | fs | ||||
LPF passband ripple | -0.05 | 0.05 | dB | |||
LPF stopband attenuation | 0.55 fs | 60 | dB | |||
LPF group delay | DC to 0.417 fs | 5.7 | 1/fs | |||
VOLTAGE
SENSE |
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DNR | Dynamic range | Un-Weighted, Relative 0 dBFS | 69 | dB | ||
THD+N | Total harmonic distortion + noise | RL = 8 Ω + 33 µH, fin = 1 kHz, POUT = 1W | -60 | dB | ||
Full-scale input voltage | 14 | VPK | ||||
Voltage-sense accuracy | RL = 8 Ω + 33 µH, IOUT = 354 mARMS (POUT = 1 W) | ±0.5% | ||||
Voltage-sense gain error over temperature | 0°C to 70°C, 8 Ω, using a 60Hz -40dB pilot tone | ±0.5% | ||||
Voltage-sense gain error over output power | 50mV to 0.1 % THD+N level, 8 Ω, using a 60Hz -40dB pilot tone | ±0.5% | ||||
LPF passband corner | fs = 16 kHz to 48 kHz | 0.417 | fs | |||
fs = 96 kHz | 0.208 | fs | ||||
fs = 192 kHz | 0.104 | fs | ||||
LPF passband ripple | -0.05 | 0.05 | dB | |||
LPF stopband attenuation | 0.55 fs | 60 | dB | |||
LPF group delay | DC to 0.417 fs | 5.7 | 1/fs | |||
VOLTAGE/CURRENT
SENSE RATIO |
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Gain ratio error over output power | 10uW to 0.1% THD+N level, fin = 1 kHz, 8Ω, using a 60Hz -40dB pilot tone | ±3% | ||||
Gain ratio error over output power | 250uW to 0.1 % THD+N level, fin = 1 kHz, 8Ω, using a 60Hz -40dB pilot tone | ±2% | ||||
Gain ratio error over output power | 50mW to 0.1 % THD+N level, fin = 1 kHz, 8Ω, using a 60Hz -40dB pilot tone | ±1% | ||||
Gain ratio drift over temperature | 0°C to 70°C | ±1% | ||||
V/I phase error | 300 | ns | ||||
TYPICAL CURRENT
CONSUMPTION |
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Current consumption in hardware shutdown | SDZ = 0, VBAT | 0.1 | µA | |||
SDZ = 0, VDD | 1 | µA | ||||
Current consumption in software shutdown | All Clocks Stopped, VBAT | 0.5 | µA | |||
All Clocks Stopped, VDD | 10 | µA | ||||
Current consumption in idle channel | Clocking 0s PCM mode, VBAT | 2.7 | mA | |||
Clocking 0s PCM mode, VDD | 8.9 | mA | ||||
Current consumption during active operation with IV sense disabled | fs = 48 kHz, VBAT | 4.6 | mA | |||
fs = 48 kHz, VDD | 8.9 | mA | ||||
Current consumption during active operation with IV sense enabled | fs = 48 kHz, VBAT | 4.6 | mA | |||
fs = 48 kHz, VDD | 11.4 | mA | ||||
PROTECTION
CIRCUITRY |
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Thermal shutdown temperature | 140 | °C | ||||
Thermal shutdown retry | 1.5 | s | ||||
VBAT undervoltage lockout threshold (UVLO) | UVLO is asserted | 2 | V | |||
UVLO is released | 2.55 | V | ||||
Output short circuit limit | Output to Output, Output to GND, Output to VBST or Output to VBAT Short | 4.5 | A |