ZHCSMU9A December 2020 – September 2021 TAS2764
PRODUCTION DATA
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7-5 | BOP_HT0[2:0] | RW | 1h | BOP level 0 hold time. 0h - 1h = Reserved 2h = 100 ms 3h = 250 ms 4h = 500ms 5h = 1000 ms 6h = 2000 ms 7h = Infinite (This can be exited using BOP_HLD_CLR bit) |
| 4 | BOP_DIS0 | RW | 0h | BOP level 0 is 0b = Enabled 1b = Disabled |
| 3-1 | Reserved | RW | 0h | Reserved |
| 0 | BOP_STAT_HLD | RW | 0h | Hold BOP status for BOP_STAT_STATE, BOP_STAT_LLVL, and BOP_STAT_PVDD. When register is set back to low the status registers will be reset and updating will resume. 0b= hold update disabled, status register readback invalid 1b= hold update enabled, status register readback valid |