The TAS2764 Class-D amplifier supports spread spectrum PWM modulation, which can be enabled by setting the AMP_SS register bit high. This can help reduce EMI in the system.

By default the Class-D amplifier switching frequency is based on the device trimmed internal oscillator. To synchronize switching to the audio sample rate, set the CLASSD_SYNC register bit high. When the Class-D is synchronized to the audio sample rate, the RAMP_RATE register bit must be set depending on the audio sample rate based on either 44.1 kHz or 48 kHz frequency. For 44.1, 88.2 and 176.4 kHz, set RAMP_RATE bit high and for 48, 96 and 192 kHz, set this bit low. This ensures that the internal ramp generator has the appropriate slope.

The TAS2764 supports closed loop edge-rate control on the class-D switching. This feature is enabled by ERC_EN register bit. With a PVDD of less that 8 V the edge rate can slow down up to two times. A slower edge-rate will reduce EMI and degrade efficiency. A faster edge-rate will improve efficiency but result in increased EMI. The edge-rate of the class-D output can be set using EDGE_RATE[1:0] register bits.