ZHCSP98B February 2022 – March 2023 TAS2780
PRODUCTION DATA
以下 I2C 序列是将 TAS2780 器件初始化到 44.1kHz 采样率的一个示例。
###### Configure Channel
w 70 60 21 # SBLK to Fs ratio = 256 / 8 TDM Slots
w 70 08 39 # 44.1KHz, Auto TDM off, Frame start High to Low
w 70 09 03 # Offset = 1, Sync on BCLK falling edge
w 70 0A 0A # TDM slot by address, Word = 24 bit, Frame = 32 bit
w 70 0C 20 # Right Ch = TDM slot 2, Left Ch = TDM slot 0
w 70 0D 33 # TX bus keeper, Hi-Z, Offset 1, TX on Falling edge