8.4.1.3 Soft Clipper Control (SFT_CLIP Pin)

The TAS5760M has a soft clipper that can be used to clip the output voltage level below the supply rail. When this circuit is active, the amplifier operates as if it was powered by a lower supply voltage, and thereby enters into clipping sooner than if the circuit was not active. The result is clipping behavior very similar to that of clipping at the PVDD rail, in contrast to the digital clipper behavior which occurs in the oversampled domain of the digital path. The point at which clipping begins is controlled by a resistor divider from GVDD_REG to ground, which sets the voltage at the SFT_CLIP pin. The precision of the threshold at which clipping occurs is dependent upon the voltage level at the SFT_CLIP pin. Because of this, increasing the precision of the resistors used to create the voltage divider, or using an external reference increases the precision of the point at which the device enters into clipping. To ensure stability, and soften the edges of the clipping event, a capacitor should be connected from pin SFT_CLIP to ground.

Figure 45. Soft Clipper Example Wave Form

To move the output stage into clipping, the soft clipper circuit limits the duty cycle of the output PWM pulses to a fixed maximum value. After filtering this limit applied to the duty cycle resembles a clipping event at a voltage below that of the PVDD level. The peak voltage level attainable when the soft clipper circuit is active, called V_P in the example below, is approximately 4 times the voltage at the SFT_CLIP pin, noted as V_{SFT_CLIP}. This voltage can be used to calculate the maximum output power for a given maximum input voltage and speaker impedance, as shown in the equation below.

Equation 2.

Where:

R_S is the total series resistance including R_DS(on), and output filter resistance.
R_L is the load resistance.
V_P is the peak amplitude achievable when the soft clipper circuit is active (As mentioned previously, V_P = [4 x V_{SFT_CLIP}], provided that [4 x V_{SFT_CLIP}] < PVDD.)
P_OUT (10%THD) ≈ 1.25 × P_OUT (unclipped)

If the PVDD level is below (4 x V_{SFT_CLIP}), clipping occurs due to clipping at PVDD before the clipping due to the soft clipper circuit becomes active.